A calibrated lumped-element de-embedding technique for on-wafer RF characterization of high-quality inductors and high-speed transistors

Abstract

The impedance errors remaining after conventional de-embedding for a high-speed transistor and a single-loop inductor test structure are investigated. A new de-embedding strategy using a physics-based lumped-element model for the test-structure parasitics calibrated on the frequency-dependent "open" and "short" dummy impedances is described, which reduces the experimental uncertainty on the de-embedded figures of merit. Using this new "calibrated lumped-element" de-embedding technique, we have been able to increase the "worst-case" values for the quality factor Q of a 0.6-nH 10-GHz single-loop inductor from 15 to 20 and for the f/sub max/ of a high-speed SiGe bipolar transistor from 80 to 110 GHz. The de-embedding technique presented here is of great importance to develop confidence in on-wafer S-parameter measurements taken at ever increasing microwave frequencies.