THE BEHAVIOR AND TESTING IMPLICATIONS OF CMOS IC LOGIC GATE OPEN CIRCUITS

Abstract

The electrical and test properties of several logic gate open circuit defect structures were measured. Results indicate that tunneling current across fine geometry discontinuities enables low frequency operation of Integrated Circuits (ICs). No significant capacitive coupling was observed for adjacent metal interconnect or for large metal opens on the gate interconnects. These results indicate the need for different methods of open circuit defect detection during test.