Proceedings of the International Conference on Parallel Processing · 2007 · 236 citations · 20 references
ComputingComputer ScienceHigh-performance ComputingCluster ComputingLow-power DesignParallel ComputingCluster ArchitectureParallel Runtime SystemsPower ManagementPower OptimizationPower-aware DesignVoltage ScalingDynamic Frequency ScalingDynamic Voltage And Frequency ScalingPower ConsumptionPower Consumption ModelingPower Management TechniquesRun-time Power ManagementRuntime System ArchitectureSystem Performance Modeling
Performance and power are critical design constraints in today's high-end computing systems. Reducing power consumption without impacting system performance is a challenge for the HPC community. We present a runtime system (CPU MISER) and an integrated performance model for performance-directed, power-aware cluster computing. CPU MISER supports system-wide, application-independent, fine-grain, dynamic voltage and frequency scaling (DVFS) based power management for a generic power-aware cluster. Experimental results show that CPU MISER can achieve as much as 20% energy savings for the NAS parallel benchmarks. In addition to energy savings, CPU MISER is able to constrain performance loss for most applications within user-specified limits. These constraints are achieved through accurate performance modeling and prediction, coupled with advanced control techniques.
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Scheduling for Reduced CPU Energy
1994 · 1.1K citations
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