IEEE Journal of Solid-State Circuits · 1990 · 18 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesBuilt-in Self-testLow-power Digital Circuit DesignMemory DevicesMemory Subsystem DesignFowler-nordheim TunnelingLow-power Memory CircuitsMemory Circuit DesignNon-volatile Memory DesignNonvolatile MemoryPower ConsumptionPower Consumption OptimizationTunneling Effects
A high-density, 5-V-only, 4-Mb CMOS EEPROM with a NAND-structured cell using Fowler-Nordheim tunneling for programming is discussed. The block-page mode is utilized for high-speed programming and easy microprocessor interface. On-chip test circuits for shortening test time and for evaluating cell characteristics yield highly reliable EEPROMs. The NAND EEPROM has many applications for microcomputer systems that require small size and large nonvolatile storage systems with low power consumption.
3
New ultra high density EPROM and flash EEPROM with NAND structure cell
F. Masuoka, M. Momodom, Yoichi Iwata et al. · 1987 · 183 citations
Engineering, Computer Engineering, Electrical Engineering +14
An experimental 4 Mb CMOS EEPROM with a NAND structured cell
Y. Itoh, M. Momodomi, R. Shirota et al. · 2003 · 40 citations
Engineering, Computer Engineering, Electrical Engineering +13