IEEE Microwave and Wireless Components Letters · 2008 · 31 citations · 9 references
EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyDigital Integrated CircuitsLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsBicmos TechnologyCore Area AnalysisFrequency SynthesizersHigh-speed OperationLow-power Cmos DesignLow-speed OperationPower ConsumptionSige Bicmos Design
A 6-GHz low power SiGe direct digital synthesizer (DDS) is reported. This letter discusses the BiCMOS design improvements used for the phase accumulator and the phase-to-amplitude conversion in order to achieve higher speed operation and lower power consumption compared to existing DDS. The phase accumulator is based on a three-level BiCMOS logic, and the phase-to-amplitude conversion is completed through a bipolar differential pair. The circuit has been processed in a BiCMOS SiGe:C 0.25 mum technology. The power consumption is 308 mW and it operates from a 2.8 V supply. The chip core area is 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .
9
Merged CMOS/bipolar current switch logic (MCSL)
W. Heimsch, B. Hoffmann, R. Krebs et al. · IEEE Journal of Solid-State Circuits · 1989 · 31 citations
Engineering, Computer Engineering, Electrical Engineering +17