Poly-Si thin-film transistors on steel substrates

Abstract

We report the successful fabrication of poly-Si thin-film transistors (TFTs) on stainless steel substrates. The TFTs were fabricated on a 500 μm thick polished stainless steel substrate using furnace crystallized amorphous Si deposited by PECVD. These devices typically have threshold voltages of 8.6 V, linear effective mobilities of 6.2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V/spl middot/s and subthreshold slopes of 0.93 decade/V. This work demonstrates the feasibility of poly-Si TFTs on stainless steel substrates and identifies some critical issues involved in poly Si processing on stainless steel. This will enable the fabrication of arrays with integrated drivers on a cheap, flexible and durable substrate for various displays and other large area array microelectronic applications.