A fully integrated 40-Gb/s clock and data recovery IC with 1:4 DEMUX in SiGe technology

Abstract

In this paper, a fully integrated 40-Gb/s clock and data recovery (CDR) IC with additional 1:4 demultiplexer (DEMUX) functionality is presented. The IC is implemented in a state-of-the-art production SiGe process. Its phase-locked-loop-based architecture with bang-bang-type phase detector (PD) provides maximum robustness. To the authors' best knowledge, it is the first 40-Gb/s CDR IC fabricated in a SiGe heterojunction bipolar technology (HBT). The measurement results demonstrate an input sensitivity of 42-mV single-ended data input swing at a bit-error rate (BER) of 10/sup -10/. As demonstrated in optical transmission experiments with the IC embedded in a 40-Gb/s link, the CDR/DEMUX shows complete functionality as a single-chip-receiver IC. A BER of 10/sup -10/ requires an optical signal-to-noise ratio of 23.3 dB.