Complementary Si MESFET concept using silicon-on-sapphire technology

Abstract

Complementary Si MESFETs (CMES) for integrated circuits using silicon-on-sapphire are described. Not only the gate, but also the source and drain of the n-transistors and p-transistors are Schottky junctions, using very high barrier heights for the gate and low barrier heights for source and drain. Only two Schottky metals are used: one, Ir or Pt, giving a high barrier on nSi, and hence low on pSi; the other, Er or Tb, showing the opposite behavior. The basic differences between MES and MOS are pointed out and design criteria for CMES inverters using normally-off type transistors are given.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>