The dual gate emitter switched thyristor (DG-EST)

Abstract

A new device structure, called the dual gate emitter switched thyristor (DG-EST), is introduced for simultaneously obtaining on-state voltage drops lower than that of the conventional emitter switched thyristor (C-EST) and the high-voltage current saturation features of the Dual Channel EST (DC-EST). The DG-EST contains a DC-EST section and a C-EST section with a common thyristor section that can be controlled using two independent gate electrodes. When a positive bias is applied to both the gates, the device operates in a thyristor mode with the thyristor current constrained to flow through two lateral MOSFETs which minimizes the on-state voltage drop. When a "zero" bias is applied to the gate of the conventional EST, the device exhibits high-voltage current saturation, with the bias on the gate of the DC-EST controlling the saturated current. In this paper, the results of measurements performed on devices fabricated with a six-mask IGBT-like process are reported.