IEEE Journal of Solid-State Circuits · 2010 · 45 citations · 12 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsComputer ArchitectureMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignIntegrated Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationRadio-frequency Integrated CircuitsAnalog-to-digital Converter DesignClock Skew ModelingColpitts OscillatorsHigh-speed Circuit DesignMillimeter-wave Integrated CircuitsRadio-frequency Integrated Circuit DesignSige Bicmos Design
The search for high speed, high bandwidth A/D converters is ongoing, and techniques to push the envelope are constantly being developed. In this paper an open loop, scalable, time-interleaved ADC architecture is presented, as well as a 60 GHz Colpitts oscillator. With the use of double-sampling, the timing skew requirements between channels is greatly relaxed, allowing sampling rates of up to 40 Gs/s at 4-bits of accuracy. This circuit is implemented using the IBM 8HP SiGe technology, with fT of 210 GHz. The performance of the 8HP ADC is validated by measurement. In addition, simulations with an experimental 8XP transistor model provided by IBM with a 350 GHz fT suggest that 30% more circuit speed is possible by just swapping the transistors.
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Time interleaved converter arrays
W.C. Black, D.A. Hodges · IEEE Journal of Solid-State Circuits · 1980 · 822 citations
Engineering, Computer Engineering, Electrical Engineering +16
A 20 GS/s 8 b ADC with a 1 MB memory in 0.18 μm CMOS
K. Poulton, R. Neff, B. Setterberg et al. · 2003 · 140 citations