2006 · 21 citations · 16 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesCmos Circuit DesignDigital Integrated Circuit DesignIntegrated Circuit DesignLow-noise Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationBicmos TechnologyCmos Analog Circuit DesignCmos Logic CircuitsLow-voltage Cmos DesignRf Cmos DesignSige Bicmos DesignTransceiver DesignVlsi Implementation
This paper presents an analysis of sub-2.5-V topologies and design methodologies for SiGe BiCMOS and sub-90nm CMOS building blocks to be used in the next generation of 40-100 Gb/s wireline transceivers. Examples of optimal designs for 40-80Gb/s broadband low-noise input comparators, low-voltage high-speed MOS- and BiCMOS CML logic gates, 30-100 GHz low-noise oscillators, and 40/80 GHz output drivers with wave shape control are provided.
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A network on chip architecture and design methodology
Shashi Kumar, Axel Jantsch, Juha-Pekka Soininen et al. · 2003 · 1.2K citations
Sorin P. Voinigescu, M.C. Maliepaard, J.L. Showell et al. · IEEE Journal of Solid-State Circuits · 1997 · 337 citations · Full text