Fuzzy logic architecture using subthreshold analogue floating-gate devices

Abstract

A subthreshold fuzzy logic architecture is proposed which includes floating-gate devices acting as nonvolatile analogue memories. The use of floating-gate devices which are embedded within the architecture reduces the size and power consumption of the system. Using the proposed subcircuits, a system containing 75 rules can be implemented in less than 5 mm/sup 2/ while consuming 500 /spl mu/W. The system is, therefore, suitable for integration within a smart sensor, an application area in which low-power consumption and compactness are potentially critical.