A modified comb filter structure for decimation

Abstract

A cascade of comb filters (or recursive running sum or sine-filters) provides an effective first stage for multistage VLSI implementations of decimators. This paper introduces a structure where, instead of a direct cascade, a tapped interconnection of comb filters is used. This structure decreases the required number of comb filters, resulting in a considerably reduced silicon area in VLSI implementations. A significant part of the savings comes from the fact that the data wordlength required for internal calculations is remarkably reduced. Examples are included illustrating the advantages of the proposed filters over the conventional direct cascades.