2003 · 192 citations · 18 references
Pmos TransistorsElectrical EngineeringCmos Inverter CircuitEngineeringDynamic NbtiStress-induced Leakage CurrentBias Temperature InstabilityApplied PhysicsDevice ReliabilityDevice LifetimeNew Nbti PhenomenonCircuit ReliabilityCmos DevicesMicroelectronicsSemiconductor Device
We report a new NBTI phenomenon for p-MOSFETs with ultra thin gate oxides. We demonstrate that in a CMOS inverter circuit, the interface traps generated under NBTI stressing in a p-MOSFET (corresponding to the "high" output state of the inverter) are subsequently passivated when the gate to drain voltage switches to positive (corresponding to the "low" output state of the inverter). As a result, it was found that this "Dynamic" NBTI (DNBTI) operating in a CMOS inverter circuit prolongs significantly the device lifetime while the conventional "static" NBTI (SNBTI) underestimates the device lifetime. Furthermore, the DNBTI effect is dependent on temperature and gate oxide thickness, but independent of operation frequency. A physical model is proposed for DNBTI that involves the interaction between hydrogen and silicon dangling bonds. This finding has significant impact on the determination of maximum operation voltage as well as lifetime projection for future scaling of CMOS devices.
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Hot-electron-induced MOSFET degradation—Model, monitor, and improvement
Chenming Hu, Simon Tam, Fu-Chieh Hsu et al. · IEEE Transactions on Electron Devices · 1985 · 1.1K citations
W.K. Henson, Khaled Ahmed, Eric M. Vogel et al. · IEEE Electron Device Letters · 1999 · 162 citations
Materials Engineering, High-frequency Capacitance-voltage, Electrical Engineering +13