International Symposium on Microarchitecture · 2003 · 149 citations · 14 references
EngineeringComputer EngineeringComputer ScienceCompilersComputer ArchitectureOperating SystemsHardware AccelerationInstruction Set ArchitectureMicroarchitecture DesignOperating System Support For HardwareProcessor MicroarchitectureDynamic Binary TranslationExecution Unit OrganizationMicroarchitecture EmulationPrecise Exception HandlingPrecise ExceptionsSimd Execution
IA-32 execution layer (IA-32 EL) is a new technology that executes IA-32 applications on Intel Itanium processor family systems. Currently, support for IA-32 applications on Itanium-based platforms is achieved using hardware circuitry on the Itanium processors. This capability will be enhanced with IA-32 EL - software that will ship with Itanium-based operating systems and will convert IA-32 instructions into Itanium instructions via dynamic translation. In this paper, we describe aspects of the IA-32 execution layer technology, including the general two-phase translation architecture and the usage of a single translator for multiple operating systems. The paper provides details of some of the technical challenges such as precise exception, emulation of FP, MMX, and Intel streaming SIMD extension instructions, and misalignment handling. Finally, the paper presents some performance results.
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Vasanth Bala, Evelyn Duesterwald, Sanjeev Banerjia · ACM SIGPLAN Notices · 2011 · 739 citations
An Infrastructure for Adaptive Dynamic Optimization
2003 · 445 citations
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Richard L. Sites, Anton Chernoff, Matthew B. Kirk et al. · Communications of the ACM · 1993 · 257 citations · Full text