Publication | Closed Access
Layout impact of resolution enhancement techniques
114
Citations
5
References
2003
Year
Unknown Venue
EngineeringElectron-beam LithographyComputer ArchitectureComputer-aided DesignMulti-resolution MethodPhysical Design (Electronics)Wafer Scale ProcessingBeam LithographyResolution Enhancement TechniquesComputational ImagingChip LayoutComputational GeometryNanolithography MethodGeometric ModelingPhotonicsDesignComputer EngineeringImage EnhancementMicroelectronicsLayout Optimization ConsiderationsArchitectural DesignNatural SciencesImage ResolutionLayout ImpactOptoelectronics
This tutorial introduces the reader to the basic concepts of optical lithography, derives fundamental resolution limits, reviews the challenges facing future technology nodes, explains the principles of resolution enhancement techniques and their impact on chip layout, and discusses layout optimization considerations.
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