IEEE Journal of Solid-State Circuits · 2001 · 64 citations · 13 references
Rs DecoderEngineeringReed-solomon Product-codeDvd ApplicationsVideo Coding FormatComputer EngineeringIterative DecodingComputer ArchitectureDecoder ChipSignal Processing
In this paper, a Reed-Solomon Product-Code (RS-PC) decoder for DVD applications is presented. It mainly contains two frame-buffer controllers, a (182, 172) row RS decoder, and a (208, 192) column RS decoder. The RS decoder features an area-efficient key equation solver using a novel modified decomposed inversionless Berlekamp-Massey algorithm. The proposed RS-PC decoder solution was implemented using 0.6 /spl mu/m CMOS single-poly double-metal (SPDM) standard cells. The chip size is 4.22/spl times/3.64 mm/sup 2/ with a core area of 2.90/spl times/2.88 mm/sup m/m/sup 2/, where the total gate count is about 26 K. Test results show that the proposed RS-PC decoder chip can support 4/spl times/DVD speed with off-chip frame buffers or 8/spl times/DVD speed with embedded frame buffers operating at 3 V.
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Shift-register synthesis and BCH decoding
J. Massey · IEEE Transactions on Information Theory · 1969 · 2.2K citations
A method for solving key equation for decoding goppa codes
Y. Sugiyama, Masao Kasahara, Shigeichi Hirasawa et al. · Information and Control · 1975 · 396 citations