Vector generation for maximum instantaneous current through supply lines for CMOS circuits

Abstract

We present two new algorithms for generating a smallset of patterns for estimating the maximum instantaneouscurrent through the power supply lines for CMOScircuits.The first algorithm is based on timed ATPG,while the second is a probability-based approach.Bothalgorithms can handle circuits with arbitrary but knowndelays and they produce a set of 2-vector tests.Experimentalresults demonstrating that the outcome of applyingour algorithms is a small set of patterns producinga current that is a tight lower bound on the maximuminstantaneous current are included.