2007 · 60 citations · 16 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingConfigurable Logic BlocksField-programmable Gate Array ArchitectureFpga ArchitecturePartial ReconfigurationProgrammable Logic DevicesReconfigurable System ArchitectureBitstream ArchitectureBitstream ManagementDirect ManipulationField-programmable Gate Array ReconfigurationMachine Code GenerationPartial Reconfiguration ArchitectureReconfigurable Hardware Architecture
Since 1998, no commercially available FPGA has been accompanied by public documentation of its native machine code (or bitstream) format. Consequently, research in reconfigurable hardware has been confined to areas which are specifically supported by manufacturer-supplied tools. Recently, detailed documentation of the bitstream format for the Atmel FPSLIC series of FPGAs appeared on the usenet group comp.arch.fpga. This information has been used to create abits, a Java library for direct manipulation of FPSLIC bitstreams and partial reconfiguration. The abits library is accompanied by the slipway reference design, a low-cost USB bus-powered board carrying an FPSLIC. This paper describes the abits library and slipway platform, as well as a few applications which they make possible. Both the abits source code and slipway board layout are publicly available under the terms of the BSD license. It is our hope that these tools will enable further research in reconfigurable hardware which would not otherwise be possible.
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Ivan E. Sutherland · Communications of the ACM · 1989 · 1K citations · Full text
Keith D. Underwood · 2004 · 248 citations
Sparse Matrix-Vector multiplication on FPGAs
Ling Zhuo, Viktor K. Prasanna · 2005 · 226 citations