A Low-Parasitic and Common-Centroid Cross-Coupled CMOS Transistor Structure for High-Frequency VCO Design

Abstract

This letter reports a cross-coupled transistor structure that allows simple routing, induces no gate-drain overlap interconnect capacitances, minimizes the parasitic resistances of interconnects, allows smaller drain-junction parasitic capacitances, and provides inherent common-centroid characteristic, all of which help to improve the high-frequency and wideband performances of CMOS voltage-controlled oscillators (VCOs). The proposed cross-coupled transistor structure is applied for a 26.2-GHz differential VCO design which dissipates 7.3 mA from 1.8-V supply using 0.18-mum CMOS. Measurements show 2.1-GHz, 29%, and 4-dB improvements in operating frequency, tuning range, and phase noise compared to those of the VCO using a conventional cross-coupled transistor layout, respectively. The VCO with the proposed transistor structure shows the phase noise of -113.7 dBc/Hz at 1 MHz, which corresponds to <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FOM</i> and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FOMT</i> of -190.4 and -194 dBc/Hz, respectively.