A 5.2Gbps HyperTransport¿ Integrated AC Coupled Receiver with DFR DC Restore

Emerson S. Fang, G. Asada, Rohit Kumar, Stephen Hale, Mike Leary

2007 · 10 citations · 2 references

Concepts

Abstract

A HyperTransport <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TM</sup> receiver with integrated AC coupling achieves an extended DC input common mode voltage without resorting to AC encoding like 8B10B. The receiver supports all HyperTransport <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TM</sup> Revision 3 (HT3) data rate from 2.4 Gbps to 5.2 Gbps. A decision feedback restore (DFR) method is used to counter baseline wander. The design is implemented in a 65 nm SOI CMOS process.

References

2