The DFT challenges and solutions for the ARM® Cortex™-A15 Microprocessor

Abstract

The DFT and test challenges faced, and the solutions applied, to the Cortex-A15 microprocessor core are described in this paper. New DFT techniques have been created to address the challenges of distributing a DFT flow that addresses multiple identical CPUs that will ultimately end up in many different design and test environments. We describe work done with EDA vendors to ensure that all mutual customers are able to implement this flow. In addition, this paper discusses the use of the ARM MBIST standardized interface in conjunction with a 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> party MBIST controller for the first time. We collaborated closely with the 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> party tool company and met all of the challenges to get this first time flow and tool capability working successfully on silicon.