Design Automation Conference · 1992 · 60 citations · 7 references
EngineeringComputer EngineeringComputer ScienceAlgorithmsComputer ArchitectureMicroelectronicsFinite State Machine ModelingFinite-state MachinesGraph AlgorithmsLogic SynthesisTiming AnalysisAsynchronous Circuit DesignAsynchronous Digital Circuit DesignAsynchronous Finite State MachinesFinite State Machine DesignFinite State Machine OptimizationLower Bound TechniquesState AssignmentState Minimization
The authors propose a novel framework to solve the state assignment problem arising from the signal transition graph (STG) representation of an asynchronous circuit. They first solve the STG state assignment problem by minimizing the number of states in the corresponding finite-state machine (FSM) and by using a critical race-free state assignment technique. State signal transitions may be added to the original STG. A lower bound on the number of signals necessary to implement the STG is given. The technique significantly increases the applicability of STGs for specifying asynchronous circuits. >
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Optimized synthesis of asynchronous control circuits from graph-theoretic specifications
Peter Vanbekbergen, Gert Goossens, Francky Catthoor et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1992 · 110 citations
Engineering, Computer Engineering, Electrical Engineering +16