Top-Gated Graphene Field-Effect Transistors Using Graphene on Si (111) Wafers

Abstract

In this letter, we report the first experimental demonstration of wafer-scale ambipolar field-effect transistor (FET) on Si (111) substrates by synthesizing a graphene layer on top of 3C-SiC(111)/Si(111) substrates. With lateral scaling of the source-drain distance to 1 μm in a top-gated layout, the ON-state current of 225 μA/μm and peak transconductance of > 40 μS/μm were obtained at Vds = 2 V, which is the highest performance of graphene-on-Si FETs. The peak field-effect mobilities of 285 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs for holes and 175 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs for electrons were demonstrated, which is higher than that of ultra-thin-body SOI (n, p) MOSFETs.