2003 · 10 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingField-programmable Gate Array ArchitectureFpga ArchitectureHardware AccelerationPartial ReconfigurationReconfigurable AcceleratorsRun-time ReconfigurationAccelerator ReconfigurationArithmetic Unit DesignPartial Reconfiguration ArchitectureReconfigurable Accelerator DesignReconfigurable ArchitecturesReconfigurable Computing ArchitecturesReconfigurationReconfiguration Of Field-programmable Gate Arrays
The paper describes the implementation of the arithmetic operations of multiplication, division and square root on a Xilinx XC6200 FPGA. By using a design approach to enhance similarities across circuits, partial reconfiguration has been used to allow reductions in reconfiguration times of up to 75% on trials using the VCC HOTWorks board.
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Design methodologies for partially reconfigured systems
Jason Hadley, Brad Hutchings · 2002 · 97 citations
Configuration compression for the Xilinx XC6200 FPGA
Scott Hauck, Zhiyuan Li, Eric J. Schwabe · 2002 · 71 citations