Gate-all-around Twin Silicon nanowire SONOS Memory

Sung Dae Suk, Kyoung Hwan Yeo, Keun Hwi Cho, Ming Li, Yun Young Yeoh, Ki‐Ha Hong, Sung‐Han Kim, Sunggon Jung, Won-Jun Jang, Dong‐Won Kim,

2007 · 31 citations · 0 references

Concepts

Abstract

We have developed gate-all-around (GAA) SONOS with ultra thin twin silicon nanowires for the first time. By using channel hot electron injection (CHEI) and hot hole injection (HHI) mechanisms, program speed of 1 mus at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> = 2 V, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> = 6 V and erase speed of 1 ms at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> = 4.5 V, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> = -6 V are achieved with 2~3 nm nanowire and 30 nm gate. Nanowire size below 10 nm dependencies on V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> shift (DeltaV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) and the program/erase (P/E) characteristics are investigated. As nanowire diameter (d <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nw</sub> ) decreases, faster program speed and larger DeltaV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> are observed.