Publication | Closed Access
A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations
18
Citations
8
References
2006
Year
Unknown Venue
Wide Tuning RangeElectrical EngineeringPhase Noise MinimizationLarge ProcessVlsi DesignEngineeringHigh-frequency DeviceCircuit SystemMixed-signal Integrated CircuitAnalog DesignLarge Pvt VariationsComputer EngineeringNoiseCmos VcosPhase NoiseMicroelectronicsAnalog-to-digital Converter
An automatic amplitude control circuit to minimize the phase noise of a LC-VCO is proposed and implemented by a 0.18-/spl mu/m CMOS process. The phase noise lower than -90dBc/Hz at 100kHz offset is achieved over a wide tuning range (from 2.2GHz to 2.8GHz) under large process (/spl Delta/V/sub th/ = /spl plusmn/100mV), temperature (from /spl sim/35/spl deg/C to 85/spl deg/C), and power supply (from 1.8V to 3V) variations.
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