Engineering of voltage nonlinearity in high-k MIM capacitor for analog/mixed-signal ICs

Abstract

It is demonstrated for the first time that voltage linearity coefficients (VCC) of metal-insulator-metal (MIM) capacitors can be engineered and virtually zero VCC can be achieved by using stacked insulator structure of high-K and SiO/sub 2/ dielectrics. Capacitance density of 6 fF/ /spl mu/m/sup 2/ and VCC of 14 ppm/V/sup 2/ achieved in this work are the best ever reported. The HfO/sub 2//SiO/sub 2/ stacked MIM shows excellent performance in other parameters as well, such as low leakage current, low TCC, and stable frequency dependence.