Publication | Closed Access
Impact of HfSiON Induced Flicker Noise on Scaling of Future Mixed-Signal CMOS
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Citations
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References
2006
Year
EngineeringVlsi DesignFuture Mixed-signal CmosAnalog DesignIntegrated CircuitsSemiconductor DeviceElectronic EngineeringMixed-signal Integrated CircuitNoiseNoise ConsiderationsDevice ModelingElectrical EngineeringGate LengthPhysicsBias Temperature InstabilityComputer EngineeringMicroelectronicsApplied PhysicsCondensed Matter PhysicsBeyond CmosExcess Traps
It is shown for the first time that HfSiON gate dielectric thickness has a strong impact on the flicker (1/f) noise of devices with L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> < 1mum. We have developed a simple model for both gate length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> ) and HfSiON thickness dependences of N-FET flicker noise, based on excess traps at the gate-edges. P-FET noise does not exhibit such strong dependences. Scaling of future analog devices with high-k gate stack may be limited by noise considerations
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