ESL power and performance estimation for heterogeneous MPSOCS using SystemC

Abstract

In this paper, we propose a top-down power and performance estimation methodology for heterogeneous multiprocessor systems-on-chip. The proposed approach is applicable at the Electronic System Level (ESL). Thus, power and performance estimation can be applied in very early design phases. By strictly separating the system functionality from its architecture, different design options can be assessed with minimal effort. Moreover, the simulation-based approach permits to evaluate the effects of dynamic power management, even at this level of abstraction. A case study from the multimedia domain is used to show the efficiency of the proposed methodology.