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Quasi-complementary BiCMOS for sub-3-V digital circuits
23
Citations
13
References
1991
Year
Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCircuit SchemeMixed-signal Integrated CircuitComputer EngineeringConventional BicmosQuasi-complementary BicmosMicroelectronicsOptoelectronicsElectromagnetic CompatibilityElectronic Circuit
The authors describe a quasi-complementary BiCMOS (QC-BiCMOS) circuit scheme for the low-supply-voltage deep-submicrometer regime. A QC-BiCMOS performs twice as fast as a CMOS even at a 2.5-V supply without a p-n-p bipolar transistor. Key circuits for this low-voltage performance are a separation between the base of the pull-up bipolar and the base of a quasi-p-n-p and the carefully designed base discharging circuit. A quasi-p-n-p combination of a pMOS and an n-p-n bipolar based on these circuits shows an equivalent cutoff frequency of over 10 GHz. The delay expressions for the QC-BiCMOS are analyzed and compared with the conventional BiCMOS. A 0.3- mu m fully loaded three-input NAND gate was fabricated, verifying that the QC-BiCMOS has more than twice the performance leverage over the conventional BiCMOS and the CMOS at a sub-3-V supply.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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