A 1.8V 2.5-5.2 GHz CMOS dual-input two-stage ring VCO

Wei-Hsuan Tu, Jyh-Yih Yeh, Hung-Chieh Tsai, Chorng‐Kuang Wang

Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits · 2004 · 42 citations · 8 references

Concepts

Abstract

A 1.8V 2.5-to-5.2 GHz dual-input two-stage CMOS voltage-controlled ring oscillator (VCO) is presented. A novel delay cell used for the two-stage ring VCO is proposed to achieve low power dissipation and better phase noise performance. The delay cell adopts both inductive-peaking and shunt-shunt feedback circuit techniques to obtain high gain and wide. Implemented in a 0.18 /spl mu/m CMOS technology using 1.8V supply voltage, the VCO has a wide operating frequency range from 2.5GHz to 5.2GHz with coarse-tune VCO gain of 4.75GHz/V and fine-tune VCO gain of 80MHz/V. At 3.6GHz, the phase noise of the VCO is -90.1dBc/Hz at 1MHz frequency offset with low power consumption of 17mW. Because of the two-stage ring topology, the VCO can provide quadrature outputs. The total chip area is 0.4mm /spl times/ 0.6mm.

References

8