Symbolic layout compaction under conditional design rules

Chung‐Kuan Cheng, Xiaotie Deng, Yihan Liao, S.-Z. Yao

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1992 · 11 citations · 13 references

Concepts

Abstract

The compaction of IC layouts subjected to conditional spacing rules in multiple-level metal technology is addressed. The constraints imposed by conditional rules make the automatic compaction of layout much more difficult than when the usual minimum separation rules are applied. To solve the problem, each conditional spacing rule is formulated with a set of arcs in the constraint graph representation. It is proven that finding the optimal solution under one bridge rule is NP-complete. A graph-theory method of compaction which, by reducing the problem size, can efficiently obtain an optimal solution is proposed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

13