Publication | Closed Access
Salicidation process using NiSi and its device application
153
Citations
11
References
1997
Year
EngineeringEducationOptoelectronic DevicesIntegrated CircuitsSilicon On InsulatorInterconnect (Integrated Circuits)Medium ProcessingInstrumentationMaterials ScienceGate ResistancesSemiconductor TechnologySemiconductor Device FabricationEvaluationDrain ResistancesMicroelectronicsDevice ApplicationSurface ScienceApplied PhysicsSelf-aligned SilicidationSensor Application
Self-aligned silicidation is a well-known process to reduce source, drain, and gate resistances of submicron metal-oxide-semiconductor devices. This process is particularly useful for devices built on very thin Si layers (∼1000 Å or less) on insulators because of the large source and drain resistances associated with the thin Si layer. NiSi is a good candidate for salicidation process due to its low resistivity, low formation temperature, little silicon consumption, and large stable processing temperature window. In this article, the formation of nickel mono-silicide (NiSi) using rapid thermal annealing, the thermal stability of NiSi on n+ poly-Si and the contact resistance of NiSi on n+ Si layers in a SIMOX structure were investigated. NiSi salicidation process was, then, incorporated into a NMOS/SIMOX device fabrication for partial and full consumption of the Si in the source and drain regions during the salicidation process. The effects of void formation and silicide encroachment on the device performance were also studied.
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