Test Structure Methodology of IC Package Material Characterization

Abstract

A methodology in assembly/packaging technology of semiconductor integrated circuits (IC's) is described Which serves a threefold purpose: it aims at characterizing and selecting electronic assembly/Packaging materials; it directs optimization and control of assembly/packaging processes; and it identifies failure mechanisms which determine product reliability. Case example applications of the methodology are reported including application to package molding compound characterization arid chip mount material selection. Conclusions are given in which a broadening of the methodology tO identify early warning indicators for prediction of later reliability failures is discussed.