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The negative capacitance effect on the C-V measurement of ultra thin gate dielectrics induced by the stray capacitance of the measurement system
26
Citations
4
References
2003
Year
Unknown Venue
Electrical EngineeringWafer Scale ProcessingEngineeringWafer ChuckC-v MeasurementNanoelectronicsElectronic EngineeringInterconnect (Integrated Circuits)Applied PhysicsTime-dependent Dielectric BreakdownNegative Capacitance EffectStray CapacitanceElectronic PackagingInstrumentationMicroelectronicsResidual InductanceHigh-frequency MeasurementElectrical Insulation
This paper describes how thin film capacitance measurements below 2 nm are affected by an anomalous "negative capacitance effect" induced by parasitic components that originate from the wafer chuck. This inductive effect is observed even though appropriate calibration is executed at the tips of the probe needle to remove the residual inductance from the measurement system. We explain the mechanism of the "negative capacitance effect" theoretically and demonstrate it experimentally. We also propose a new methodology for on-wafer C-V measurements that can reduce this inductive effect that originates from system parasitics while at the same time expanding the practical frequency range of measurement to 100 MHz.
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