Engineering strained silicon-looking back and into the future

Abstract

The purpose of this article is to explain the basics behind straining and report on the current process technologies available to strain CMOS devices. Strained Si enhances the performance of CMOS devices by increasing carrier mobility without having to make them smaller. As the benefits to be gained from scaling transistors continue to decrease, the commercial interest in using strained Si for CMOS devices has spiked. Additionally, strained Si still retains its integratability in CMOS manufacturing processes, unlike any other semiconductor material. Thus the real test for engineers lies in the ability to cost-effectively develop and apply strained Si technology into current CMOS process. Thus new methods for straining Si is integrated into IC manufacturing as industry interest in this technology continues to grow and also increases the speed, performance and functions of the circuits.