Proceedings of the IEEE · 2003 · 481 citations · 7 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureMicroelectronicsSemiconductor DevicesDevice ModelingDevice ScalingFinite State Machine ModelingNanoelectronicsBarriersDevice Scaling EffectsEnergy-efficient ComputationReversible Circuit DesignScaling EffectsScaling Effects In CmosScaling TheoryVon Neumann Architecture
In this paper we consider device scaling and speed limitations on irreversible von Neumann computing that are derived from the requirement of "least energy computation." We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.
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