Publication | Closed Access
Efficient techniques for timing correction
27
Citations
6
References
2002
Year
Unknown Venue
EngineeringCompiler TechnologyVerificationComputer ArchitectureSystem-level DesignClock SynchronizationHardware SystemsClock RecoveryTiming AnalysisSystems EngineeringParallel ComputingCompilersFrontier MotionBoolean DistributionComputer EngineeringComputer ScienceEfficient TechniquesOptimizing CompilerSignal ProcessingLogic SynthesisFormal MethodsShannon ExpansionParallel Programming
Three computationally efficient methods (frontier motion, Shannon expansion, and Boolean distribution) for restructuring logic which fails to meet timing specifications are described. These techniques appear, at first glance, to be unrelated; however, it is shown that there is a deep underlying connection among them. These methods are used in IBM's LSS. The results of experiments that demonstrate that timing correction can be effectively performed on industrial examples in the context of a compiler-like logic synthesis system are reported.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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