Publication | Closed Access
SEGR Study on Power MOSFETs: Multiple Impacts Assumption
22
Citations
13
References
2008
Year
Device ModelingBackside IrradiationElectrical EngineeringGate DegradationEngineeringFluence PhiIon ImplantationPower DeviceSegr StudyPower Semiconductor DeviceTime-dependent Dielectric BreakdownSingle Event EffectsPower ElectronicsIon EmissionMicroelectronics
This paper presents experimental data showing heavy ions inducing gate degradation in power MOSFETs. In the experiments, backside and front-side irradiations are performed. During backside irradiation, the heavy ion ranges are tuned in such way to control whether they hit the gate or not. Gate-to-source current Igss (Phi) is measured versus heavy ions (H.I.) fluence Phi. Post-irradiation-gate-stress-test (PGST) allows measurement of gate breakdown voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BD</sub> (Phi) which is observed to decrease with (H.I.) fluence. Based on these experimental results, a hypothesis of substrate-generated carriers impact overlap of multiple strikes may explain gate degradation until SEGR triggering. This last hypothesis is supported by a statistical model approach of heavy ions multiple impacts.
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