Solder joint crack propagation analysis of wafer-level chip scale package on printed circuit board assemblies

Abstract

The solder-joint reliability of a low-cost wafer-level chip scale package (WLCSP) on printed circuit board (PCB) under thermal fatigue is studied. The solder joints are subjected to thermal cycling and their crack lengths at different thermal cycles are measured. Also, the stress intensity factors at the crack tip of different crack lengths in the corner solder joint are determined by fracture mechanics with finite element method. Furthermore, an empirical equation for predicting the thermal-fatigue life of flip chip solder joints is proposed.