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2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read
229
Citations
14
References
2008
Year
SpintronicsElectrical EngineeringArray SchemeUniversal MemoryEngineeringMemory ArchitectureNon-volatile MemoryParallelizing-direction Current ReadMum Logic ProcessComputer EngineeringComputer ArchitectureMagnetoresistive Random-access MemoryMemory DeviceSemiconductor MemoryMicroelectronicsSpin-transfer Torque RamMb SpramMulti-channel Memory Architecture
A 1.8 V 2 Mb SPin-transfer torque RAM (SPRAM) chip using a 0.2 mum logic process with an MgO tunneling barrier cell demonstrates the circuit technologies for potential low-power nonvolatile RAM, or universal memory. This chip features an array scheme with bit-by-bit bi-directional current writing to achieve proper spin-transfer torque writing of 100 ns, and parallelizing-direction current reading with a low-voltage bit-line for preventing read disturbances that lead to 40 ns access time.
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