IEEE Journal of Solid-State Circuits · 2008 · 229 citations · 14 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesMemory DevicesMemory Subsystem DesignSpintronicsLow-power Memory ArchitectureLow-power Memory CircuitsMemory Circuit DesignNon-volatile Memory DesignNonvolatile MemoryRandom Access Memory (Ram)Spin-transfer TorqueSpin-transfer Torque Memory
A 1.8 V 2 Mb SPin-transfer torque RAM (SPRAM) chip using a 0.2 mum logic process with an MgO tunneling barrier cell demonstrates the circuit technologies for potential low-power nonvolatile RAM, or universal memory. This chip features an array scheme with bit-by-bit bi-directional current writing to achieve proper spin-transfer torque writing of 100 ns, and parallelizing-direction current reading with a low-voltage bit-line for preventing read disturbances that lead to 40 ns access time.
14
Giant tunnelling magnetoresistance at room temperature with MgO (100) tunnel barriers
S. Parkin, Christian Kaiser, Alex Panchula et al. · Nature Materials · 2004 · 3.3K citations