A circuit level implementation of an adaptive issue queue for power-aware microprocessors

Abstract

Article A circuit level implementation of an adaptive issue queue for power-aware microprocessors Share on Authors: Alper Buyuktosunoglu University of Rochester, Electrical and Computer Engineering, Rochester, NY University of Rochester, Electrical and Computer Engineering, Rochester, NYView Profile , David Albonesi University of Rochester, Electrical and Computer Engineering, Rochester, NY University of Rochester, Electrical and Computer Engineering, Rochester, NYView Profile , Stanley Schuster IBM T. J. Watson Research Center, Yorktown Heights, NY IBM T. J. Watson Research Center, Yorktown Heights, NYView Profile , David Brooks IBM T. J. Watson Research Center, Yorktown Heights, NY IBM T. J. Watson Research Center, Yorktown Heights, NYView Profile , Pradip Bose IBM T. J. Watson Research Center, Yorktown Heights, NY IBM T. J. Watson Research Center, Yorktown Heights, NYView Profile , Peter Cook IBM T. J. Watson Research Center, Yorktown Heights, NY IBM T. J. Watson Research Center, Yorktown Heights, NYView Profile Authors Info & Claims GLSVLSI '01: Proceedings of the 11th Great Lakes symposium on VLSIMarch 2001 Pages 73–78https://doi.org/10.1145/368122.368807Online:01 March 2001Publication History 63citation474DownloadsMetricsTotal Citations63Total Downloads474Last 12 Months11Last 6 weeks3 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access