2002 · 27 citations · 8 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingConfigurable Logic BlocksDigital Signal ProcessingField-programmable Gate Array ArchitectureFpga ArchitectureHardware AccelerationReconfigurable AcceleratorsDigital Signal Processing Block ArchitectureDigital Signal Processing BlocksFast Fourier Transform Circuit DesignField-programmable Gate Arrays (Fpgas)High-speed Circuit Design
This paper presents a novel FPGA implementation of a two dimensional (8/spl times/8) point Discrete Cosine Transform. It is shown how the development of a suitable architectural style can produce high quality circuit designs for a specific technology, in this case the Xilinx XC6200 series of FPGA. Distributed arithmetic and exploitation of parallelism and pipelining are used to produce a DCT implementation on a single FPGA that operates at 25 frames per second with VGA resolution which is the equivalent of 2 million multiplications or additions per second.
8