Lightly doped drain transistors for advanced VLSI circuits

Abstract

A comprehensive analysis of lightly doped drain (LDD) transistors is presented. We discuss LDD characteristics and ways to model the n-series resistance. This LDD structure has also been found to exhibit greater stability than conventional transistors when subjected to accelerated aging. By analyzing circuits employing both LDD and conventional devices we examine the tradeoffs between circuit performance and long-term circuit stability. We conclude that the fabrication sequence presented for an optimum LDD transistor will result in improved long-term circuit stability with minimal reduction in circuit performance.