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Endurance Prediction of Scaled NAND Flash Memory Based on Spatial Mapping of Erase Tunneling Current
12
Citations
3
References
2011
Year
Unknown Venue
Non-volatile MemoryElectrical EngineeringEngineeringArbitrary SizeNanoelectronicsEndurance PredictionTunnel OxideApplied PhysicsFlash MemoryComputer EngineeringComputer ArchitectureMemory DeviceErase Tunneling CurrentSemiconductor MemoryMicroelectronicsSpatial MappingEndurance Curve
In this work, we present novel endurance prediction technique for scaled NAND Flash memory with arbitrary size and shape. Predicted endurance curve is obtained by simulation of several program/erase (PGM/ERS) cycle steps with subsequent determination of midgap voltage. Each step of simulated PGM/ERS cycles corresponds to specific distribution of trapped charge concentration in tunnel oxide. Distribution function of the trapped charge is found through mapping of ERS tunneling current. Absolute value of the trapped charge is obtained via calibration of the reference device with known endurance curve (42 nm node). Using proposed method, endurance of 27 nm-node device has been extracted and verified.
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