Application of hardness-by-design methodology to radiation-tolerant ASIC technologies

Abstract

Radiation-hard ASIC design is enabled by the trend in commercial microelectronics toward increased radiation hardness, demonstrated here with new radiation results on a 0.25-/spl mu/m commercial process utilizing shallow trench isolation. A design comparison is made between creating ASICs targeting a traditional rad-hard foundry, which may be more than two generations behind commercial foundries, applying hardness-by-design methodology at a commercial foundry, and directly targeting a commercial foundry using commercial design practices.