Publication | Closed Access
Electrical Modeling of Interconnections in Multilayer Packaging Structures
33
Citations
4
References
1987
Year
Multilayer Packaging StructuresElectrical EngineeringChip-scale PackageEngineeringAdvanced Packaging (Semiconductors)Physical Design (Electronics)Chip On BoardProgram EfficiencyInductance MatricesInterconnect (Integrated Circuits)Computer EngineeringComputational ElectromagneticsElectronic PackagingMicroelectronicsQuasi-static ApproximationElectrical InsulationElectromagnetic Compatibility
An effort toward modeling the interconnections in selected typical multilayer packaging structures is presented. The modeling is based on a quasi-static approximation to the associated electro-magnetic problems. A program for computing capacitance and inductance matrices and the numerical techniques used to improve the program efficiency are described. The results of numerical testing of the program are provided and discussed. The program was also compared with experimental data published in the open literature and the results are shown. The agreement between the model and the experiments is satisfactory.
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