High-density IC chip integration with parylene pocket

Abstract

We utilize the parylene pocket technology and develop a novel integration scheme that will allow us to connect more than 100 bonding pads on an area less than 5 mm × 5 mm with high efficiency. This packaging technique can also house any IC chip or discrete component and provide electrical connection to it. Here we use squeegee technique to connect each pad on the chip with the bonding pad on the pocket to achieve functionality because the chip that is to be integrated in this section has a very dense array and it is impractical and extremely difficult to connect everything manually. Devices testing are done by testing dummy chip integration and soaking test. Positive results prove that such parylene pocket packaging technique works well.