A 24 GHz Dual-Modulus Prescaler in 90 nm CMOS

Abstract

We present a completely integrated 24 GHz prescaler with programmable division ratios of /4 and /5. The prescaler uses high speed differential current mode logic. AND-gates are merged with flip-flops for low power consumption and minimum gate delay. Broadband static operation up 24 GHz is achieved with on-chip shunt peaking inductors in the flipflops. A broadband output buffer is included in the circuit to drive 50 /spl Omega/ loads. The circuit draws 49 mA from a single 1.2 V supply. With a reduced supply voltage of 0.9 V the maximum operating frequency of the prescaler is 22 GHz and the total power dissipation is 27 mW. The circuit is manufactured in 90 nm bulk CMOS technology.